A single-chip 5.8 GHz ETC transceiver IC with PLL and demodulator uses SiGe HBT/CMOS. The fully integrated ETC chip includes a 31 dB-gain RX stage, an ASK demodulator, and a high-precision RSSI. The PLL is constructed with a varactor-tuned LC-VCO and a low-power BiCMOS synthesizer. The TX stage incorporates a transformer-transferred single-ended PA.
|Journal||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|Publication status||Published - 2002 Jan 1|
|Event||2002 IEEE International Solid-State Circuits Conference - San Francisco, CA, United States|
Duration: 2002 Feb 3 → 2002 Feb 7
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering