Simulation of dopant redistribution during gate oxidation including transient-enhanced diffusion caused by implantation damage

Tetsuya Uchida, Katsumi Eikyu, Eiji Tsukuda, Masato Fujinaga, Akinobu Teramoto, Tomohiro Yamashita, Tatsuya Kunikiyo, Kiyoshi Ishikawa, Norihiko Kotani, Satoru Kawazu, Chihiro Hamaguchi, Tadashi Nishimura

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)


Dopant redistribution during gate oxidation in metal-oxide-semiconductor (MOS) fabrication processes has been studied by secondary-ion mass spectrometry (SIMS). In the first set of experiments, dopant profiles after gate oxidation are measured and compared to those after N2 annealing. From the measured profiles, the contribution of oxidation-enhanced diffusion (OED) to the entire dopant redistribution is determined and an OED model parameter is calibrated. In the second set of experiments, samples which are subjected only to wafer loading and unloading steps are prepared and dopant profiles are measured. From the measured profiles, the magnitude of transient-enhanced diffusion (TED) which occurs during the wafer loading step is estimated and an interstitial-clustering parameter is calibrated. The parameters calibrated in this study are combined with the point-defect parameters taken from the literature, and dopant redistribution during the entire gate oxidation cycle is simulated. Calculated dopant profiles agree well with the measured SIMS profiles and show correct time dependence of TED and OED, as observed in the present experiments. In the simulations, interstitial concentration at the oxidizing Si/SiO2 interface is found to be 40 times the equilibrium concentration. The supersaturation caused by surface oxidation is small and the contribution of OED is negligible under typical gate oxidation conditions where oxide thickness is less than 100 Å. Dopant profiles after gate oxidation are mainly dominated by TED. However, as oxidation proceeds, the contribution of OED increases because it continues while TED almost ends in the wafer loading step of gate oxidation. Segregation of boron in the channel region is also studied. It is found that a greater amount of boron is lost in oxidation than in N2 annealing. The effect of segregation on device characteristics is not negligible for buried-channel PMOS devices, because the threshold voltage of the devices is sensitive to the change in the amount of boron.

Original languageEnglish
Pages (from-to)2565-2576
Number of pages12
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Issue number5 A
Publication statusPublished - 2000 May 1
Externally publishedYes


  • Dopant diffusion
  • Gate oxidation
  • Lsi fabrication process
  • Oxidation-enhanced diffusion
  • Process simulation
  • Transient-enhanced diffusion

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)


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