SiGe-on-insulator substrate fabricated by melt solidification for a strained-silicon complementary metal-oxide-semiconductor

Nobuyuki Sugii; Shinya Yamaguchi; Katsuyoshi Washio

doi:10.1116/1.1501576

SiGe-on-insulator substrate fabricated by melt solidification for a strained-silicon complementary metal-oxide-semiconductor

Nobuyuki Sugii, Shinya Yamaguchi, Katsuyoshi Washio

Research output: Contribution to journal › Article › peer-review

17 Citations (Scopus)

Abstract

A novel technique for fabricating completely strain-relaxed SiGe-on-insulator substrates with low surface roughness and dislocation density suitable for the strained-silicon CMOS was made. Thus, a completely strain-relaxed SiGe layer of uniform composition and high crystallinity could be grown by this method. The defect density of this substrate was found to be less than 1000 cm^-2, and its surface roughness was 0.39 nm (rms).

Original language	English
Pages (from-to)	1891-1896
Number of pages	6
Journal	Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
Volume	20
Issue number	5
DOIs	https://doi.org/10.1116/1.1501576
Publication status	Published - 2002 Sep 1
Externally published	Yes

ASJC Scopus subject areas

Condensed Matter Physics
Electrical and Electronic Engineering

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SiGe-on-insulator substrate fabricated by melt solidification for a strained-silicon complementary metal-oxide-semiconductor. / Sugii, Nobuyuki; Yamaguchi, Shinya; Washio, Katsuyoshi.

In: Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, Vol. 20, No. 5, 01.09.2002, p. 1891-1896.

Research output: Contribution to journal › Article › peer-review

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