Abstract
This paper presents the concept of `set-valued logic' as a foundation for next-generation integrated systems free from interconnection problems. The set-valued logic system employs multiplexable information carriers to achieve highly parallel processing with reduced interconnections. This paper also proposes a new approach to the construction of set-valued logic VLSIs employing pseudo-random sequences as information carriers.
| Original language | English |
|---|---|
| Pages (from-to) | 140-147 |
| Number of pages | 8 |
| Journal | Proceedings of The International Symposium on Multiple-Valued Logic |
| Publication status | Published - 1998 Jan 1 |
| Event | Proceedings of the 1998 28th International Symposium on Multiple-Valued Logic - Fukuoka, Jpn Duration: 1998 May 27 → 1998 May 29 |
ASJC Scopus subject areas
- Chemical Health and Safety
- Hardware and Architecture
- Safety, Risk, Reliability and Quality
- Logic
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Cite this
Aoki, T., & Higuchi, T. (1998). Set-valued logic circuits for next generation VLSI architectures. Proceedings of The International Symposium on Multiple-Valued Logic, 140-147.