Self-reference read scheme for a 1T/1C FeRAM

Junichi Yamada, Tohru Miwa, Hiroki Koike, Hideo Toyoshima

Research output: Contribution to conferencePaperpeer-review

12 Citations (Scopus)

Abstract

This paper describes a self-reference read scheme for use with 1T/1C FeRAMs. It is able to overcome the reference voltage problem faced by conventional 1T/1C FeRAMs without the use of any reference cells. The proposed scheme employs a memory cell that is accessed twice, and it uses this cell to generate a reference voltage. This self-generated reference voltage is automatically kept between read bit line voltages, which correspond to stored data (`1' and `0'). We have designed and fabricated a test device, and confirmed the viability of the read scheme.

Original languageEnglish
Pages238-241
Number of pages4
Publication statusPublished - 1998 Jan 1
Externally publishedYes
EventProceedings of the 1998 Symposium on VLSI Circuits - Honolulu, HI, USA
Duration: 1998 Jun 111998 Jun 13

Other

OtherProceedings of the 1998 Symposium on VLSI Circuits
CityHonolulu, HI, USA
Period98/6/1198/6/13

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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