Abstract
A multiple-valued current-mode (MVCM) circuit based on dual-rail differential logic has been proposed for high-speed arithmetic systems at a low supply voltage. This paper presents a new totally self-checking circuit based on dual-rail MVCM logic, where almost all the basic components except a differential-pair circuit have been already duplicated, which results in small hardware overhead compared with a non-self-checking circuit based on dual-rail MVCM logic. Moreover, the performance of the proposed self-checking circuit is superior to that of full duplication of the non-self-checking circuit based on dual-rail MVCM logic in terms of transistor counts, switching delay and dynamic power dissipation under a 0.5-μm standard CMOS technology.
| Original language | English |
|---|---|
| Pages (from-to) | 275-279 |
| Number of pages | 5 |
| Journal | Proceedings of The International Symposium on Multiple-Valued Logic |
| Publication status | Published - 1999 Jan 1 |
| Event | Proceedings of the 1999 29th International Symposium on Multiple-Valued Logic (ISMVL-99) - Freiburg im Breisgau, Ger Duration: 1999 May 20 → 1999 May 22 |
ASJC Scopus subject areas
- Computer Science(all)
- Mathematics(all)
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Hanyu, T., Ike, T., & Kameyama, M. (1999). Self-checking multiple-valued circuit based on dual-rail current-mode differential logic. Proceedings of The International Symposium on Multiple-Valued Logic, 275-279.