Self-Aligned Complementary Bipolar Technology for Low-Power Dissipation and Ultra-High-Speed LSI's

Takahiro Onai; Eiji Ohue; Yohji Idei; Katsuyoshi Washio; Tohru Nakamura; Masamichi Tanabe; Hiromi Shimamoto

doi:10.1109/16.368037

Self-Aligned Complementary Bipolar Technology for Low-Power Dissipation and Ultra-High-Speed LSI's

Takahiro Onai, Eiji Ohue, Yohji Idei, Katsuyoshi Washio, Tohru Nakamura, Masamichi Tanabe, Hiromi Shimamoto

Research output: Contribution to journal › Article › peer-review

9 Citations (Scopus)

Abstract

Fully symmetrical complementary bipolar transistors for low power-dissipation and ultra-high-speed LSI's have been integrated in the same chip using a 0.3-µm SPOTEC process. Reducing the surface concentration of the boron by oxidation at the surface of the boron diffusion layer suppressed the upward diffusion of boron from the subcollector of the pnp transistor during epitaxial growth. This enabled thin epitaxial layer growth for both npn and pnp transistors simultaneously. Cutoff frequencies of 30 and 32 GHz were obtained in npn and pnp transistors, respectively. Simulated results showed that the power dissipation is reduced to 1/5 in a complementary active pull-down circuit compared with an ECL circuit.

Original language	English
Pages (from-to)	413-418
Number of pages	6
Journal	IEEE Transactions on Electron Devices
Volume	42
Issue number	3
DOIs	https://doi.org/10.1109/16.368037
Publication status	Published - 1995 Jan 1
Externally published	Yes

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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abstract = "Fully symmetrical complementary bipolar transistors for low power-dissipation and ultra-high-speed LSI's have been integrated in the same chip using a 0.3-µm SPOTEC process. Reducing the surface concentration of the boron by oxidation at the surface of the boron diffusion layer suppressed the upward diffusion of boron from the subcollector of the pnp transistor during epitaxial growth. This enabled thin epitaxial layer growth for both npn and pnp transistors simultaneously. Cutoff frequencies of 30 and 32 GHz were obtained in npn and pnp transistors, respectively. Simulated results showed that the power dissipation is reduced to 1/5 in a complementary active pull-down circuit compared with an ECL circuit.",

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AU - Onai, Takahiro

AU - Ohue, Eiji

AU - Idei, Yohji

AU - Washio, Katsuyoshi

AU - Nakamura, Tohru

AU - Tanabe, Masamichi

AU - Shimamoto, Hiromi

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AB - Fully symmetrical complementary bipolar transistors for low power-dissipation and ultra-high-speed LSI's have been integrated in the same chip using a 0.3-µm SPOTEC process. Reducing the surface concentration of the boron by oxidation at the surface of the boron diffusion layer suppressed the upward diffusion of boron from the subcollector of the pnp transistor during epitaxial growth. This enabled thin epitaxial layer growth for both npn and pnp transistors simultaneously. Cutoff frequencies of 30 and 32 GHz were obtained in npn and pnp transistors, respectively. Simulated results showed that the power dissipation is reduced to 1/5 in a complementary active pull-down circuit compared with an ECL circuit.

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Self-Aligned Complementary Bipolar Technology for Low-Power Dissipation and Ultra-High-Speed LSI's

Abstract

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