Search space reduction for parameter tuning of a tsunami simulation on the intel knights landing processor

Kazuhiko Komatsu, Takumi Kishitani, Masayuki Sato, Akihiro Musa, Hiroaki Kobayashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The structures of recent computing systems have become complicated such as heterogeneous memory systems with a deep hierarchy and many core systems. To achieve high performance of HPC applications on such computing systems, performance tuning is mandatory. However, the number of tuning parameters has become large due to the complexities of the systems and applications. In addition, along with the improvement of computing systems, HPC applications are getting larger and complicated, resulting in long execution time of each application execution. Due to a large number of tuning parameters and a long time of each execution, a time to search for an appropriate tuning parameter combination becomes huge. This paper proposes a method to reduce the time to search for an appropriate tuning parameter combination. By considering the characteristics of a many-core processor and a simulation code, a search space of tuning parameters is reduced. Moreover, a time of each application execution for parameter search is reduced by limiting a simulation period of an application unless characteristics of the application are changed. Through the evaluation of performance tuning using the tsunami simulation code on the Intel Xeon Phi Knight Landing processor, it is clarified that a 3.67x performance improvement can be achieved by the parameter tuning. It is also clarified that the time for parameter tuning can drastically be saved by reducing the number of tuning parameters to be searched and limiting the simulation period of each application execution.

Original languageEnglish
Title of host publicationProceedings - 2018 IEEE 12th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages117-124
Number of pages8
ISBN (Electronic)9781538666890
DOIs
Publication statusPublished - 2018 Nov 16
Event12th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2018 - Hanoi, Viet Nam
Duration: 2018 Sep 122018 Sep 14

Publication series

NameProceedings - 2018 IEEE 12th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2018

Other

Other12th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2018
Country/TerritoryViet Nam
CityHanoi
Period18/9/1218/9/14

Keywords

  • Many core processor
  • Parameter tuning
  • Search space reduction
  • Tsunami simulation

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

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