Scaling Theory for Double-Gate SOI MOSFET's

Kunihiro Suzuki, Tetsu Tanaka, Yoshiharu Tosaka, Hiroshi Horie, Yoshihiro Arimoto

Research output: Contribution to journalArticlepeer-review

496 Citations (Scopus)


We established a scaling theory for double-gate SOI MOSFET's, which gives a guidance for the device design (silicon thickness tsi; gate oxide thickness tox) so that maintaining a subthreshold factor for a given gate length LG. According to our theory, a device can be designed with a gate length of less than 0.1 μm while maintaining the ideal subthreshold factor, which is verified numerically with a two-dimensional device simulator.

Original languageEnglish
Pages (from-to)2326-2329
Number of pages4
JournalIEEE Transactions on Electron Devices
Issue number12
Publication statusPublished - 1993 Dec
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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