Scalable cell technology utilizing domain wall motion for high-speed MRAM

H. Numata, T. Suzuki, N. Ohshima, S. Fukami, K. Nagahara, N. Ishiwata, N. Kasai

Research output: Contribution to journalConference articlepeer-review

36 Citations (Scopus)


We propose a new MRAM cell that stores data in the form of the domain wall (DW) position. The DW is moved by the spin-polarized current that flows in the free layer. The cell was fabricated and the writing characteristics were investigated. A writing current of the cell was scalable, and the current density was reduced by using a new material. The cell is suitable for a high-speed MRAM that will compete with an eSRAM.

Original languageEnglish
Article number4339705
Pages (from-to)232-233
Number of pages2
JournalDigest of Technical Papers - Symposium on VLSI Technology
Publication statusPublished - 2007 Dec 1
Externally publishedYes
Event2007 Symposium on VLSI Technology, VLSIT 2007 - Kyoto, Japan
Duration: 2007 Jun 122007 Jun 14

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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