Scalability of spin field programmable gate arrary: A reconfigurable architecture based on spin metal-oxide-semiconductor field effect transistor

Tetsufumi Tanamoto, Hideyuki Sugiyama, Tomoaki Inokuchi, Takao Marukame, Mizue Ishikawa, Kazutaka Ikegami, Yoshiaki Saito

Research output: Contribution to journalArticlepeer-review

17 Citations (Scopus)

Abstract

The scalability of a field programmable gate array (FPGA) using a spin metal-oxide-semiconductor field effect transistor (MOSFET) (spin FPGA) with a magnetocurrent (MC) ratio in the range of 100-1000 is discussed for the first time. The area and speed of million-gate spin FPGAs are numerically benchmarked with CMOS FPGA for 22, 32, and 45 nm technologies including a 20 transistor size variation. We show that the area is reduced and the speed is increased in spin FPGA due to the nonvolatile memory function of spin MOSFET.

Original languageEnglish
Article number07C312
JournalJournal of Applied Physics
Volume109
Issue number7
DOIs
Publication statusPublished - 2011 Apr 1
Externally publishedYes

ASJC Scopus subject areas

  • Physics and Astronomy(all)

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