Scalability of Quad Interface p-MTJ for 1X nm STT-MRAM with 10 ns Low Power Write Operation, 10 years Retention and Endurance 10-11

S. Miura, K. Nishioka, H. Naganuma, Thi Van Anh Nguyen, H. Honjo, S. Ikeda, T. Watanabe, H. Inoue, Masaaki Niwa, T. Tanigawa, Y. Noguchi, T. Yoshiduka, M. Yasuhira, T. Endoh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

We have firstly fabricated quad-interface perpendicular MTJ (Quad-MTJ) down to 33 nm with our developed PVD, RIE and damage control integration process technologies under 300 mm process. Secondly, we demonstrated scalability merit as well as high speed writing of Quad-MTJ compared with double-interface p-MTJ (Double-MTJ) as follows; (a) two times larger thermal stability factor δ(1X nm Quad- MTJ is extrapolated to achieve 10 years retention.), (b) lower write voltage at short write pulse regions at less than 30 ns, (c) in scaled MTJ, effective suppression of write current increase for higher write speed, (d) more than 2 times higher write efficiency at 10ns write operation down to 33 nm MTJ. Finally, we revealed that our developed 33 nm Quad-MTJ achieve excellent endurance of more 1011 thanks to higher write efficiency and low damage integration process technology. These results show that the Quad-MTJ technology is one of promising way for low power, high speed and enough reliable STT -MRAM with excellent scalability down to 1X nm node.

Original languageEnglish
Title of host publication2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728164601
DOIs
Publication statusPublished - 2020 Jun
Event2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Honolulu, United States
Duration: 2020 Jun 162020 Jun 19

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2020-June
ISSN (Print)0743-1562

Conference

Conference2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020
CountryUnited States
CityHonolulu
Period20/6/1620/6/19

Keywords

  • i-PMA
  • p-MTJ
  • Quad interface
  • scalability
  • STT-MRAM
  • thermal stability factor
  • write efficiency

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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