Resistance measurement platform for statistical analysis of next generation memory materials

Takeru Maeda, Yuya Omura, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Shigetoshi Sugawa

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

A newly developed resistance measurement platform is presented in this paper. The measurement platform consists of an array test circuit fabricated by a conventional 0.18 μm 1-Poly-Si 5-Metal layers CMOS technology, and a measurement target material formed on top of the 5M layer of the platform by an additional process. Using this platform, we can measure the resistance of various materials only by forming the measurement target layer and the top metal layer on the platform additionally. The resistance measurement operation was verified by measuring 234 poly-Si test resistor pre-formed by the poly-Si gate electrode layer in the array test circuit. Furthermore, 200 nm thick amorphous-Si layer was formed as a measurement target material on the platform and 490,700 cells were measured. The resistance measurement of 490,700 cells was conducted within 0.5 s with the resistance range of 500 Ω- 10MΩ. We observed random telegraph noise (RTN) in some amorphous-Si cells. The developed platform is very useful for research and development of new memory materials, as well as for developing process, process equipment, and device structure to improve the reliability and performance of next generation memories.

Original languageEnglish
Title of host publication2019 IEEE 32nd International Conference on Microelectronic Test Structures, ICMTS 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages70-75
Number of pages6
ISBN (Electronic)9781728114668
DOIs
Publication statusPublished - 2019 Mar
Event32nd IEEE International Conference on Microelectronic Test Structures, ICMTS 2019 - Kitakyushu City, Fukuoka Prefecture, Japan
Duration: 2019 Mar 182019 Mar 21

Publication series

NameIEEE International Conference on Microelectronic Test Structures
Volume2019-March

Conference

Conference32nd IEEE International Conference on Microelectronic Test Structures, ICMTS 2019
CountryJapan
CityKitakyushu City, Fukuoka Prefecture
Period19/3/1819/3/21

Keywords

  • Measurement
  • Memory
  • Platform
  • Resistance
  • Statistical analysis

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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