Residue arithmetic based multiple-valued VLSI image processor

Makoto Honda; Michitaka Kameyama; Tatsuo Higuchi

Residue arithmetic based multiple-valued VLSI image processor

Makoto Honda, Michitaka Kameyama, Tatsuo Higuchi

INF - Computer and Mathematical Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

An ultra-high-performance VLSI image processor based on a multivalued residue arithmetic circuit is proposed for robot vision. Data communication between the mod m_i arithmetic units is not necessary in the residue arithmetic system, so that multiple mod m_i arithmetic units can be on different chips. Therefore, a number of mod m_i multiplier adders can be implemented on a single VLSI chip based on the modulus-slice concept. Each mod m_i arithmetic unit can be effectively implemented in parallel using the concept of pseudoprimitive root and multivalued current-mode circuit technology. Thus, the use of parallelism throughout makes the performance very high in comparison with the ordinary binary implementation.

Original language	English
Title of host publication	Proceedings of The International Symposium on Multiple-Valued Logic
Publisher	Publ by IEEE
Pages	330-336
Number of pages	7
ISBN (Print)	0818626801
Publication status	Published - 1992 May 1
Event	Proceedings of the 22nd International Symposium on Multiple-Valued Logic - Sendai, Jpn Duration: 1992 May 27 → 1992 May 29

Publication series

Name	Proceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)	0195-623X

Other

Other	Proceedings of the 22nd International Symposium on Multiple-Valued Logic
City	Sendai, Jpn
Period	92/5/27 → 92/5/29

ASJC Scopus subject areas

Computer Science(all)
Mathematics(all)

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Cite this

Residue arithmetic based multiple-valued VLSI image processor. / Honda, Makoto; Kameyama, Michitaka; Higuchi, Tatsuo.

Proceedings of The International Symposium on Multiple-Valued Logic. Publ by IEEE, 1992. p. 330-336 (Proceedings of The International Symposium on Multiple-Valued Logic).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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