Relationships between interface structures and electrical properties in the high-κ/III-V system

Tetsuji Yasuda, Noriyuki Miyata, Yuji Urabe, Hiroyuki Ishii, Taro Itatani, Hideki Takagi, Hisashi Yamada, Noboru Fukuhara, Masahiko Hata, Akihiro Ohtake, Masafumi Yokoyama, Takuya Hoshii, Takashi Haimoto, Momoko Deura, Masakazu Sugiyama, Mitsuru Takenaka, Shinichi Takagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)


Integration of III-V channel MISFETs on the Si platform expectedly improves the performance and reduces the power consumption of CMOS devices with sub-10 nm gate lengths. Issues relating to the dielectrics/III-V interfaces are explored in this paper. A wide variety of interface structures were prepared by employing MOCVD-grown epitaxial wafers, surface reconstruction control in MBE, wet/dry surface pretreatments, and deposition of dielectrics (Al 2O3, HfO2) by ALD or electron-beam evaporation. Relationships between the structures of the interfaces and the MIS properties are discussed, with particular attention to the effects of the cation composition (Al, Ga, In) in the semiconductor bulk and at the interface, anion control at the interface (sulfidation, nitridation), and the surface orientation [(100) versus (111)]. Recent developments in III-V-on-insulator wafer technology are also reported.

Original languageEnglish
Title of host publicationHigh-k Dielectrics on Semiconductors with High Carrier Mobility
Number of pages12
Publication statusPublished - 2010
Event2009 MRS Fall Meeting - Boston, MA, United States
Duration: 2009 Nov 302009 Dec 4

Publication series

NameMaterials Research Society Symposium Proceedings
ISSN (Print)0272-9172


Other2009 MRS Fall Meeting
Country/TerritoryUnited States
CityBoston, MA

ASJC Scopus subject areas

  • Materials Science(all)
  • Condensed Matter Physics
  • Mechanics of Materials
  • Mechanical Engineering


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