TY - GEN
T1 - Recent progresses in STT-MRAM and SOT-MRAM for next generation MRAM
AU - Endoh, Tetsuo
AU - Honjo, Hiroaki
AU - Nishioka, Koichi
AU - Ikeda, Shoji
N1 - Publisher Copyright:
© 2020 IEEE.
Copyright:
Copyright 2020 Elsevier B.V., All rights reserved.
PY - 2020/6
Y1 - 2020/6
N2 - In last decade, since high performance MTJ using CoFeB/MgO-based interfacial perpendicular magnetic anisotropy (IPMA) is utilized, STT-MRAM technology has rapidly progressed and mass-production of STT-MRAM has already started in the semiconductor companies. However, for further expansion of MRAM applications and markets, higher reliability, larger capacity or speed are required. In this invited paper, we describe our recent progresses in STT-/SOT-MRAM fabricated under developed 300mm integration process (PVD, RIE etc.) [4] with advanced spintronics device technologies, such as quad-interface MTJ [10] and canted SOT device [12].
AB - In last decade, since high performance MTJ using CoFeB/MgO-based interfacial perpendicular magnetic anisotropy (IPMA) is utilized, STT-MRAM technology has rapidly progressed and mass-production of STT-MRAM has already started in the semiconductor companies. However, for further expansion of MRAM applications and markets, higher reliability, larger capacity or speed are required. In this invited paper, we describe our recent progresses in STT-/SOT-MRAM fabricated under developed 300mm integration process (PVD, RIE etc.) [4] with advanced spintronics device technologies, such as quad-interface MTJ [10] and canted SOT device [12].
UR - http://www.scopus.com/inward/record.url?scp=85098193487&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85098193487&partnerID=8YFLogxK
U2 - 10.1109/VLSITechnology18217.2020.9265042
DO - 10.1109/VLSITechnology18217.2020.9265042
M3 - Conference contribution
AN - SCOPUS:85098193487
T3 - Digest of Technical Papers - Symposium on VLSI Technology
BT - 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020
Y2 - 16 June 2020 through 19 June 2020
ER -