Realization of FIR digital filters based on stochastic/binary hybrid computation

Shunsuke Koshita; Naoya Onizawa; Masahide Abe; Takahiro Hanyu; Masayuki Kawamata

doi:10.1109/ISMVL.2016.40

Realization of FIR digital filters based on stochastic/binary hybrid computation

Shunsuke Koshita, Naoya Onizawa, Masahide Abe, Takahiro Hanyu, Masayuki Kawamata

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Citations (Scopus)

Abstract

Recently, some attempts have been made to apply stochastic computation to realization of Finite Impulse Response (FIR) digital filters. Such new FIR filter realizations lead to significant reduction of hardware complexity over the conventional filter realizations based on binary computation. However, the stochastic FIR filters suffer from lower computational accuracy than the FIR filters based on binary computation. This paper presents a new method for realization of stochastic FIR filters to improve computational accuracy. In the proposed method, multipliers are realized using stochastic computation but adders are realized using binary computation. Evaluation results demonstrate that our method achieves a 7dB improvement in stopband attenuation.

Original language	English
Title of host publication	Proceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016
Publisher	IEEE Computer Society
Pages	223-228
Number of pages	6
ISBN (Electronic)	9781467394888
DOIs	https://doi.org/10.1109/ISMVL.2016.40
Publication status	Published - 2016 Jul 18
Event	46th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2016 - Sapporo, Hokkaido, Japan Duration: 2016 May 18 → 2016 May 20

Publication series

Name	Proceedings of The International Symposium on Multiple-Valued Logic
Volume	2016-July
ISSN (Print)	0195-623X

Other

Other	46th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2016
Country	Japan
City	Sapporo, Hokkaido
Period	16/5/18 → 16/5/20

ASJC Scopus subject areas

Computer Science(all)
Mathematics(all)

Access to Document

10.1109/ISMVL.2016.40

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Koshita, S., Onizawa, N., Abe, M., Hanyu, T., & Kawamata, M. (2016). Realization of FIR digital filters based on stochastic/binary hybrid computation. In Proceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016 (pp. 223-228). [7515552] (Proceedings of The International Symposium on Multiple-Valued Logic; Vol. 2016-July). IEEE Computer Society. https://doi.org/10.1109/ISMVL.2016.40

Realization of FIR digital filters based on stochastic/binary hybrid computation. / Koshita, Shunsuke; Onizawa, Naoya ; Abe, Masahide ; Hanyu, Takahiro; Kawamata, Masayuki.

Proceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016. IEEE Computer Society, 2016. p. 223-228 7515552 (Proceedings of The International Symposium on Multiple-Valued Logic; Vol. 2016-July).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Koshita, S, Onizawa, N , Abe, M , Hanyu, T & Kawamata, M 2016, Realization of FIR digital filters based on stochastic/binary hybrid computation. in Proceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016., 7515552, Proceedings of The International Symposium on Multiple-Valued Logic, vol. 2016-July, IEEE Computer Society, pp. 223-228, 46th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2016, Sapporo, Hokkaido, Japan, 16/5/18. https://doi.org/10.1109/ISMVL.2016.40

Koshita S, Onizawa N , Abe M , Hanyu T, Kawamata M. Realization of FIR digital filters based on stochastic/binary hybrid computation. In Proceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016. IEEE Computer Society. 2016. p. 223-228. 7515552. (Proceedings of The International Symposium on Multiple-Valued Logic). https://doi.org/10.1109/ISMVL.2016.40

Koshita, Shunsuke ; Onizawa, Naoya ; Abe, Masahide ; Hanyu, Takahiro ; Kawamata, Masayuki. / Realization of FIR digital filters based on stochastic/binary hybrid computation. Proceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016. IEEE Computer Society, 2016. pp. 223-228 (Proceedings of The International Symposium on Multiple-Valued Logic).

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