Real/complex reconfigurable arithmetic using redundant complex number systems

Takafumi Aoki, Hiroaki Amada, Tatsuo Higuchi

Research output: Contribution to conferencePaperpeer-review

15 Citations (Scopus)

Abstract

This paper presents a hardware algorithm for a real/complex reconfigurable arithmetic unit, which can change its structure for three different arithmetic, modes in real time. The three modes realize (i) a single-precision complex-number multiplication, (ii) a double-precision real-number multiplication, and (iii) a pair of single-precision real-number four-operand multiply-add operations, respectively. We discuss the reconfiguration of hardware structure on the basis of the transformation of the number system used in each arithmetic mode. The designed arithmetic unit can perform high-speed real/complex arithmetic computations based on binary-tree addition scheme, and also exhibits highly regular structure suited for VLSI implementation.

Original languageEnglish
Pages200-207
Number of pages8
Publication statusPublished - 1997 Jan 1
EventProceedings of the 1997 13th IEEE Symposium on Computer Arithmetic - Asilomar, CA, USA
Duration: 1997 Jul 61997 Jul 9

Other

OtherProceedings of the 1997 13th IEEE Symposium on Computer Arithmetic
CityAsilomar, CA, USA
Period97/7/697/7/9

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

Fingerprint Dive into the research topics of 'Real/complex reconfigurable arithmetic using redundant complex number systems'. Together they form a unique fingerprint.

Cite this