Prospects of Hf-based gate dielectrics by PVD with FUSI gate for LSTP application

M. Niwa, R. Mitsuhashi, S. Hayashi, K. Yamamoto, Y. Harada, M. Kubota, A. Rothchild, T. Hoffmann, S. Kubicek, A. Lauwers, J. A. Kittl, S. De Gendt, M. Heyns, S. Biesemans

Research output: Contribution to journalConference articlepeer-review

1 Citation (Scopus)

Abstract

Study of Hf-based high-k gate stack prepared by PVD-HfO2 and its silicate with Ni-Fully Silicide(FUSI) gate focusing on interfacial reaction between high-k and Ni-FUSI electrode is overviewed. Effects of SiN capping between Ni-FUSI gate and high-k dielectric and post deposition anneal (PDA) to suppress the reaction during FUSI process were investigated. The SiN cap could increase transistor yield and PDA could suppress instability of the drive current due to defects/roughness caused by interfacial reaction during NiSi formation. It is noteworthy that not only elimination of poly-Si depletion but also EOT reduction was observed by replacing the poly-Si with the Ni-FUSI, which was remarkable for Ni-FUSI/SiON than HfO2 case. Hereof, by optimizing the PDA condition with SiN cap, decent electrical characteristics were obtained, Ion(n/p) > 600/200 uA/um at Ioff = 20 pA/um at Vdd = 1.1V. This drivability meets low stand-by power specification of the MOSFET for 45 nm node. copyright The Electrochemical Society.

Original languageEnglish
Pages (from-to)269-285
Number of pages17
JournalECS Transactions
Volume1
Issue number5
DOIs
Publication statusPublished - 2005 Dec 1
Event3rd International Symposium on High Dielectric Constant Gate Stacks - 208th Meeting of the Electrochemical Society - Los Angeles, CA, United States
Duration: 2005 Oct 162005 Oct 21

ASJC Scopus subject areas

  • Engineering(all)

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