Prospects of Hf-based gate dielectrics by PVD with FUSI gate for LSTP application

M. Niwa; R. Mitsuhashi; S. Hayashi; K. Yamamoto; Y. Harada; M. Kubota; A. Rothchild; T. Hoffmann; S. Kubicek; A. Lauwers; J. A. Kittl; S. De Gendt; M. Heyns; S. Biesemans

doi:10.1149/1.2209276

Prospects of Hf-based gate dielectrics by PVD with FUSI gate for LSTP application

M. Niwa, R. Mitsuhashi, S. Hayashi, K. Yamamoto, Y. Harada, M. Kubota, A. Rothchild, T. Hoffmann, S. Kubicek, A. Lauwers, J. A. Kittl, S. De Gendt, M. Heyns, S. Biesemans

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

Study of Hf-based high-k gate stack prepared by PVD-HfO₂ and its silicate with Ni-Fully Silicide(FUSI) gate focusing on interfacial reaction between high-k and Ni-FUSI electrode is overviewed. Effects of SiN capping between Ni-FUSI gate and high-k dielectric and post deposition anneal (PDA) to suppress the reaction during FUSI process were investigated. The SiN cap could increase transistor yield and PDA could suppress instability of the drive current due to defects/roughness caused by interfacial reaction during NiSi formation. It is noteworthy that not only elimination of poly-Si depletion but also EOT reduction was observed by replacing the poly-Si with the Ni-FUSI, which was remarkable for Ni-FUSI/SiON than HfO₂ case. Hereof, by optimizing the PDA condition with SiN cap, decent electrical characteristics were obtained, I_on(n/p) > 600/200 uA/um at I_off = 20 pA/um at V_dd = 1.1V. This drivability meets low stand-by power specification of the MOSFET for 45 nm node. copyright The Electrochemical Society.

Original language	English
Title of host publication	Physics and Technology of High-k Gate Dielectrics III
Publisher	Electrochemical Society Inc.
Pages	269-285
Number of pages	17
Edition	5
ISBN (Electronic)	1566774446
DOIs	https://doi.org/10.1149/1.2209276
Publication status	Published - 2006
Externally published	Yes
Event	3rd International Symposium on High Dielectric Constant Gate Stacks - 208th Meeting of the Electrochemical Society - Los Angeles, CA, United States Duration: 2005 Oct 16 → 2005 Oct 21

Publication series

Name	ECS Transactions
Number	5
Volume	1
ISSN (Print)	1938-5862
ISSN (Electronic)	1938-6737

Other

Other	3rd International Symposium on High Dielectric Constant Gate Stacks - 208th Meeting of the Electrochemical Society
Country/Territory	United States
City	Los Angeles, CA
Period	05/10/16 → 05/10/21

ASJC Scopus subject areas

Engineering(all)

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10.1149/1.2209276

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Niwa, M., Mitsuhashi, R., Hayashi, S., Yamamoto, K., Harada, Y., Kubota, M., Rothchild, A., Hoffmann, T., Kubicek, S., Lauwers, A., Kittl, J. A., De Gendt, S., Heyns, M., & Biesemans, S. (2006). Prospects of Hf-based gate dielectrics by PVD with FUSI gate for LSTP application. In Physics and Technology of High-k Gate Dielectrics III (5 ed., pp. 269-285). (ECS Transactions; Vol. 1, No. 5). Electrochemical Society Inc.. https://doi.org/10.1149/1.2209276

Niwa, M, Mitsuhashi, R, Hayashi, S, Yamamoto, K, Harada, Y, Kubota, M, Rothchild, A, Hoffmann, T, Kubicek, S, Lauwers, A, Kittl, JA, De Gendt, S, Heyns, M & Biesemans, S 2006, Prospects of Hf-based gate dielectrics by PVD with FUSI gate for LSTP application. in Physics and Technology of High-k Gate Dielectrics III. 5 edn, ECS Transactions, no. 5, vol. 1, Electrochemical Society Inc., pp. 269-285, 3rd International Symposium on High Dielectric Constant Gate Stacks - 208th Meeting of the Electrochemical Society, Los Angeles, CA, United States, 05/10/16. https://doi.org/10.1149/1.2209276

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title = "Prospects of Hf-based gate dielectrics by PVD with FUSI gate for LSTP application",

abstract = "Study of Hf-based high-k gate stack prepared by PVD-HfO2 and its silicate with Ni-Fully Silicide(FUSI) gate focusing on interfacial reaction between high-k and Ni-FUSI electrode is overviewed. Effects of SiN capping between Ni-FUSI gate and high-k dielectric and post deposition anneal (PDA) to suppress the reaction during FUSI process were investigated. The SiN cap could increase transistor yield and PDA could suppress instability of the drive current due to defects/roughness caused by interfacial reaction during NiSi formation. It is noteworthy that not only elimination of poly-Si depletion but also EOT reduction was observed by replacing the poly-Si with the Ni-FUSI, which was remarkable for Ni-FUSI/SiON than HfO2 case. Hereof, by optimizing the PDA condition with SiN cap, decent electrical characteristics were obtained, Ion(n/p) > 600/200 uA/um at Ioff = 20 pA/um at Vdd = 1.1V. This drivability meets low stand-by power specification of the MOSFET for 45 nm node. copyright The Electrochemical Society.",

author = "M. Niwa and R. Mitsuhashi and S. Hayashi and K. Yamamoto and Y. Harada and M. Kubota and A. Rothchild and T. Hoffmann and S. Kubicek and A. Lauwers and Kittl, {J. A.} and {De Gendt}, S. and M. Heyns and S. Biesemans",

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AU - Niwa, M.

AU - Mitsuhashi, R.

AU - Hayashi, S.

AU - Yamamoto, K.

AU - Harada, Y.

AU - Kubota, M.

AU - Rothchild, A.

AU - Hoffmann, T.

AU - Kubicek, S.

AU - Lauwers, A.

AU - Kittl, J. A.

AU - De Gendt, S.

AU - Heyns, M.

AU - Biesemans, S.

PY - 2006

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AB - Study of Hf-based high-k gate stack prepared by PVD-HfO2 and its silicate with Ni-Fully Silicide(FUSI) gate focusing on interfacial reaction between high-k and Ni-FUSI electrode is overviewed. Effects of SiN capping between Ni-FUSI gate and high-k dielectric and post deposition anneal (PDA) to suppress the reaction during FUSI process were investigated. The SiN cap could increase transistor yield and PDA could suppress instability of the drive current due to defects/roughness caused by interfacial reaction during NiSi formation. It is noteworthy that not only elimination of poly-Si depletion but also EOT reduction was observed by replacing the poly-Si with the Ni-FUSI, which was remarkable for Ni-FUSI/SiON than HfO2 case. Hereof, by optimizing the PDA condition with SiN cap, decent electrical characteristics were obtained, Ion(n/p) > 600/200 uA/um at Ioff = 20 pA/um at Vdd = 1.1V. This drivability meets low stand-by power specification of the MOSFET for 45 nm node. copyright The Electrochemical Society.

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Prospects of Hf-based gate dielectrics by PVD with FUSI gate for LSTP application

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