Proposal of a new electronic structure model of ohmic contacts for the future metallic source and drain

Yukihiro Takada, Masakazu Muraguchi, Tetsuo Endoh, Shintaro Nomura, Kenji Shiraishi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Recently, metallic source and drain is widely discussed with LSIs scaling trend. For this technology, it is essential to fabricate low resistive Ohmic contact between electrodes and the channel materials. However, it is expected that precise Schottky barrier height control for obtaining Ohmic contact is technologically difficult. One of the main reasons is that Fermi level pinning phenomena takes place when a metal/semiconductor interface is formed. Recently, we have proposed a new Ohmic contact model in which resonant tunneling through the defect levels in a Schottky barrier is an origin of Ohmic characteristics. In this paper, we have considered our propose Ohmic contact model which is compatible with interface physics concepts, such as a charge neutrality level which can describe essential properties of metal/semiconductor interfaces. We calculate the current-voltage characteristics based on our proposed model up to the operating temperature of the integrated circuits. Our calculated results show that our proposed model can reproduce linear Ohmic I-V characteristics from room temperature to the operation temperature of the integrated circuits.

Original languageEnglish
Title of host publicationIWJT-2010
Subtitle of host publicationExtended Abstracts - 2010 International Workshop on Junction Technology
Pages78-81
Number of pages4
DOIs
Publication statusPublished - 2010 Jul 9
Event10th International Workshop on Junction Technology, IWJT-2010 - Shanghai, China
Duration: 2010 May 102010 May 11

Publication series

NameIWJT-2010: Extended Abstracts - 2010 International Workshop on Junction Technology

Other

Other10th International Workshop on Junction Technology, IWJT-2010
CountryChina
CityShanghai
Period10/5/1010/5/11

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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