Process and device technologies for high speed self-aligned bipolar transistors

Tohru Nakamura, Takeo Shiba, Takahiro Onai, Takashi Uchino, Yukihiro Kiyota, Katsuyoshi Washio, Noriyuki Homma

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

Recent high-speed bipolar technologies based on SICOS (Sidewall Base Contact Structure) transistors are reviewed. Bipolar device structures that include polysilicon are key technologies for improving circuit characteristics. As the characteristics of the upward operated SICOS transistors are close to those of downward transistors, they can easily be applied in memory cells which have near-perfect soft-error-immunity. Newly developed process technologies for making shallow base and emitter junctions to improve circuit performance are also reviewed. Finally, complementary bipolar technology for low-power and high-speed circuits using pnp transistors, and a quasi-drift base transistor structure suitable for below 0.1 μm emitters are discussed.

Original languageEnglish
Pages (from-to)1154-1164
Number of pages11
JournalIEICE Transactions on Electronics
VolumeE78-C
Issue number9
Publication statusPublished - 1995 Sep 1
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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