We have studied the performance of a readout system with ASIC chips for our gamma camera based on 64 channels multi-anode PSPMT(Hamamatsu flat-panel H8500) coupled to a GSO(Ce) scintillator array. The GSO array consists of 8×8 pixels of 6×6×13mm3 with the same pixel pitch as the anode of H8500. This camera is intended for an absorber of an Electron Tracking Compton gamma-ray camera which measures up to about 1 MeV gamma-ray. We need a readout system with low power consumption in order to make a camera which has 64×108 readout channels for a balloon-borne experiment. We adopted the ASIC chip, IDEAS VA32-HDR11, with low power consumption of 1.3 W/64 ch and dynamic range of ∼-35 pC, which is one of chips with widest range among commercial ones. However, we have to operate the H8500 with the low gain of about 105 because it only measures up to about 100 keV gamma-ray with the typical gain of about 106, and we developed an attenuator board in order to operate the H8500 with the typical gain. The attenuator board has 64 singular resistors adjusted to the anode gain and uniforms variation of the anode gain of the H8500, min:max∼1:2.3, before inputs to ASIC chips. Using the board, The H8500 was able to operate with the gain of about 106 and the output signals from that board had a good uniformity of min:max∼1:1.2. The system with the new attenuator board has the incident energy dynamic range of 30 to 900keV, the position resolution of less than 6mm, and a typical energy resolution of about 11.7%(FWHM) at 662keV.
|Journal||Proceedings of Science|
|Publication status||Published - 2007|
|Event||International Workshop on New Photon-Detectors, PD 2007 - Kobe, Japan|
Duration: 2007 Jun 27 → 2007 Jun 29
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