Performance evaluation of FPGA-based custom accelerators for iterative linear-equation solvers

Kentaro Sano, Satoru Yamamoto, Yoshiaki Hatsuda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In this paper, we evaluate the performance of an FPGA(Field-Programmable Gate Array)-based computing system that accelerates iterative linear-equation solvers with a low memory-bandwidth. The pipelining approach is applied to the computing kernels over successive iterations, allowing the accelerator to scale the performance with a constant bandwidth. The prototype implementation with multiple FPGAs demonstrates almost linear speedup and higher performance than software execution on a microprocessor.

Original languageEnglish
Title of host publication20th AIAA Computational Fluid Dynamics Conference 2011
Publication statusPublished - 2011
Event20th AIAA Computational Fluid Dynamics Conference 2011 - Honolulu, HI, United States
Duration: 2011 Jun 272011 Jun 30

Publication series

Name20th AIAA Computational Fluid Dynamics Conference 2011

Other

Other20th AIAA Computational Fluid Dynamics Conference 2011
CountryUnited States
CityHonolulu, HI
Period11/6/2711/6/30

ASJC Scopus subject areas

  • Fluid Flow and Transfer Processes
  • Energy Engineering and Power Technology
  • Aerospace Engineering
  • Mechanical Engineering

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