Performance evaluation of a partial retraining scheme for defective multi-layer neural networks

K. Yamamori, Toru Abe, S. Horiguchi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper addresses an efficient stuck-defect compensation scheme for multi-layer artificial neural networks implemented in hardware devices. To compensate for stuck defects, we have proposed a two-stage partial retraining scheme that adjusts weights belonging to a neuron affected by defects based on back-propagation (BP) algorithm between two layers. For input neurons, the partial retraining scheme is applied two times; first-stage between the input layer and the hidden layer, second-stage between the hidden layer and the output layer. The partial retraining scheme does not need any additional circuits if the hardware neural network has circuits for learning. In this paper we discuss the performance of the partial retraining scheme, retraining time, network yield and generalization ability. As a result, the partial retraining scheme could compensate the neuron stuck defects about 10 times faster than the whole network retraining by BP algorithm. In addition, yields of networks are also improved. The partial retraining scheme achieved more than 80% recognition ratio for noisy input patterns when 16% neurons of the network have 0-stuck or 1-stuck defects.

Original languageEnglish
Title of host publicationProceedings of the Australasian Computer Systems Architecture Conference, ACSAC
PublisherIEEE Computer Society
Pages138-145
Number of pages8
Volume2001-January
ISBN (Print)0769509541
DOIs
Publication statusPublished - 2001
Externally publishedYes
Event6th Australasian Computer Systems Architecture Conference, ACSAC 2001 - Gold Coast, Australia
Duration: 2001 Jan 292001 Jan 30

Other

Other6th Australasian Computer Systems Architecture Conference, ACSAC 2001
CountryAustralia
CityGold Coast
Period01/1/2901/1/30

Keywords

  • Artificial neural networks
  • Circuit faults
  • Equations
  • Information science
  • Multi-layer neural network
  • Neural network hardware
  • Neural networks
  • Neurons
  • Pattern recognition
  • Signal to noise ratio

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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