Abstract
Chemical-mechanical-polishing (CMP) was used to smooth the surface of a SiGe substrate, on which strained-Si n- and p-MOSFETs were fabricated. By applying CMP after growing the SiGe buffer layer, the surface roughness was considerably reduced, namely, to 0.4 nm (rms). A strained-Si layer was then successfully grown on the CMP-treated SiGe substrate. The fabricated strained-Si MOSFETs showed good turn-off characteristics, (i.e., equivalent to those of Si control devices). Moreover, capacitance-voltage (CV) measurements revealed that the quality of the gate oxide of the strained-Si devices was the same as that of the Si control devices. Flat-band and threshold voltages of the strained-Si devices were different from those of the Si control devices mainly due to band discontinuity. Electron and hole mobilities of strained-Si MOSFETs under a vertical field up to 1.5 MV/cm increased by 120% and 42%, respectively, compared to the universal mobility. Furthermore, current drive of the n- and p-MOSFETs (Leff ≥ 0.3 μm) was increased roughly by 70% and 50%, respectively. These improvements in characteristics indicate that CMP of the SiGe substrate is a critical technique for developing high-performance strained-Si CMOS.
Original language | English |
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Pages (from-to) | 2237-2243 |
Number of pages | 7 |
Journal | IEEE Transactions on Electron Devices |
Volume | 49 |
Issue number | 12 |
DOIs | |
Publication status | Published - 2002 Dec |
Externally published | Yes |
Keywords
- Epitaxial layers
- MOSFETs
- Semiconductor heterojunctions
- Strain
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering