Performance comparison of 2D and 3D FPGAs using true-3D CAD tool

Naoto Miyamoto, Hanpei Koike, Yohei Matsumoto, Tadayuki Matsumura, Kenichi Osada, Yaoko Nakagawa, Keisuke Toyama, Tadahiro Ohmi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

3-dimensional (3D) integration is imperative for the future of semiconductor devices. The 3D field-programmable gate array (FPGA) is one of the killer applications in this field because large-scale FPGA requires numerous wire segments that conventional 2D integration cannot deal with. We have developed a true-3D computer-aided design (CAD) tool for the 3D FPGA and have quantitatively compared its performance against that of a 2D FPGA. Experimental results indicate that the 3D FPGA is superior to 2D FPGA in terms of both smaller critical path delay and smaller area.

Original languageEnglish
Title of host publication54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
DOIs
Publication statusPublished - 2011 Oct 13
Event54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 - Seoul, Korea, Republic of
Duration: 2011 Aug 72011 Aug 10

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Other

Other54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
CountryKorea, Republic of
CitySeoul
Period11/8/711/8/10

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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