TY - GEN
T1 - Performance comparison of 2D and 3D FPGAs using true-3D CAD tool
AU - Miyamoto, Naoto
AU - Koike, Hanpei
AU - Matsumoto, Yohei
AU - Matsumura, Tadayuki
AU - Osada, Kenichi
AU - Nakagawa, Yaoko
AU - Toyama, Keisuke
AU - Ohmi, Tadahiro
PY - 2011/10/13
Y1 - 2011/10/13
N2 - 3-dimensional (3D) integration is imperative for the future of semiconductor devices. The 3D field-programmable gate array (FPGA) is one of the killer applications in this field because large-scale FPGA requires numerous wire segments that conventional 2D integration cannot deal with. We have developed a true-3D computer-aided design (CAD) tool for the 3D FPGA and have quantitatively compared its performance against that of a 2D FPGA. Experimental results indicate that the 3D FPGA is superior to 2D FPGA in terms of both smaller critical path delay and smaller area.
AB - 3-dimensional (3D) integration is imperative for the future of semiconductor devices. The 3D field-programmable gate array (FPGA) is one of the killer applications in this field because large-scale FPGA requires numerous wire segments that conventional 2D integration cannot deal with. We have developed a true-3D computer-aided design (CAD) tool for the 3D FPGA and have quantitatively compared its performance against that of a 2D FPGA. Experimental results indicate that the 3D FPGA is superior to 2D FPGA in terms of both smaller critical path delay and smaller area.
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U2 - 10.1109/MWSCAS.2011.6026302
DO - 10.1109/MWSCAS.2011.6026302
M3 - Conference contribution
AN - SCOPUS:80053644649
SN - 9781612848570
T3 - Midwest Symposium on Circuits and Systems
BT - 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
T2 - 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
Y2 - 7 August 2011 through 10 August 2011
ER -