Parameterized design and evaluation of bandwidth compressor for floating-point data streams in FPGA-based custom computing

Tomohiro Ueno, Yoshiaki Kono, Kentaro Sano, Satoru Yamamoto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

We are applying bandwidth compression to enhance performance of FPGA-based custom computing. This paper presents and evaluates hardware design of a bandwidth compressor and decompressor for a floating-point data stream of various bit width. We show their structures parameterized for a bit width of an input word. Through FPGA-based prototype implementation, we evaluate the resource utilization, frequency, and compression ratio. The expermental results show that the compressor and decompressor for 32-bit and 64-bit floating-point numbers achieve bandwidth reduction at a ratio of 3.1 and 1.8 for 2D data of fluid dynamics computation, while they require only small area and operate at higher than 200MHz.

Original languageEnglish
Title of host publicationReconfigurable Computing
Subtitle of host publicationArchitectures, Tools, and Applications - 9th International Symposium, ARC 2013, Proceedings
Pages90-102
Number of pages13
DOIs
Publication statusPublished - 2013 Apr 3
Event9th International Symposium on Applied Reconfigurable Computing, ARC 2013 - Los Angeles, CA, United States
Duration: 2013 Mar 252013 Mar 27

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume7806 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other9th International Symposium on Applied Reconfigurable Computing, ARC 2013
CountryUnited States
CityLos Angeles, CA
Period13/3/2513/3/27

Keywords

  • bandwidth compression
  • custom computing
  • floating-point data stream
  • parameterized design

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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  • Cite this

    Ueno, T., Kono, Y., Sano, K., & Yamamoto, S. (2013). Parameterized design and evaluation of bandwidth compressor for floating-point data streams in FPGA-based custom computing. In Reconfigurable Computing: Architectures, Tools, and Applications - 9th International Symposium, ARC 2013, Proceedings (pp. 90-102). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 7806 LNCS). https://doi.org/10.1007/978-3-642-36812-7_9