Overview and future challenges of floating Body RAM (FBRAM) technology for 32nm technology node and beyond

Takeshi Hamamoto, Takashi Ohsawa

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    5 Citations (Scopus)

    Abstract

    Floating Body Cell (FBC) is a one-transistor memory cell on SOI substrate, which aims high density embedded memory on SOC. In order to verify this memory cell technology, a 128Mb Floating Body RAM (FBRAM) with FBC has been designed and successfully developed. The memory cell design and the experimental results, including single cell (1 Cell/Bit) operation, are reviewed. Based on the experimental results, the scalability of FBC is also discussed.

    Original languageEnglish
    Title of host publicationESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference
    PublisherIEEE Computer Society
    Pages25-29
    Number of pages5
    ISBN (Print)9781424423644
    DOIs
    Publication statusPublished - 2008 Jan 1
    EventESSDERC 2008 - 38th European Solid-State Device Research Conference - Edinburgh, Scotland, United Kingdom
    Duration: 2008 Sep 152008 Sep 19

    Publication series

    NameESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference

    Other

    OtherESSDERC 2008 - 38th European Solid-State Device Research Conference
    CountryUnited Kingdom
    CityEdinburgh, Scotland
    Period08/9/1508/9/19

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

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  • Cite this

    Hamamoto, T., & Ohsawa, T. (2008). Overview and future challenges of floating Body RAM (FBRAM) technology for 32nm technology node and beyond. In ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference (pp. 25-29). [4681692] (ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference). IEEE Computer Society. https://doi.org/10.1109/ESSDERC.2008.4681692