Optimizing memory layout of hyperplane ordering for vector supercomputer SX-aurora TSUBASA

Osamu Watanabe, Yuta Hougi, Kazuhiko Komatsu, Masayuki Sato, Akihiro Musa, Hiroaki Kobayashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper describes the performance optimization of hyperplane ordering methods applied to the high cost routine of the turbine simulation code called 'Numerical Turbine' for the newest vector supercomputer. The Numerical Turbine code is a computational fluid dynamics code developed at Tohoku University, which can execute large-scale parallel calculation of the entire thermal flow through multistage cascades of gas and steam turbines. The Numerical Turbine code is a memory- intensive application that requires a high memory bandwidth to achieve a high sustained performance. For this reason, it is implemented in a vector supercomputer equipped with a high-performance memory subsystem. The main performance bottleneck of the Numerical Turbine code is the time-integration routine. To vectorize the lower-upper symmetric Gauss-Seidel method used in this time integration routine, a hyperplane ordering method is used. We clarify the problems of the current hyperplane ordering methods for the newest vector supercom- puter NEC SX-Aurora TSUBASA and propose an optimized hyperplane ordering method that changes the data layout in the memory to resolve this bottleneck. Through the performance evaluation, it is clarified that the proposed hyperplane ordering can achieve further improvement of the performance by up to 2.77×, and 1.27× on average.

Original languageEnglish
Title of host publicationProceedings of MCHPC 2019
Subtitle of host publicationWorkshop on Memory Centric High Performance Computing - Held in conjunction with SC 2019: The International Conference for High Performance Computing, Networking, Storage and Analysis
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages25-32
Number of pages8
ISBN (Electronic)9781728160078
DOIs
Publication statusPublished - 2019 Nov
Event2019 IEEE/ACM Workshop on Memory Centric High Performance Computing, MCHPC 2019 - Denver, United States
Duration: 2019 Nov 18 → …

Publication series

NameProceedings of MCHPC 2019: Workshop on Memory Centric High Performance Computing - Held in conjunction with SC 2019: The International Conference for High Performance Computing, Networking, Storage and Analysis

Conference

Conference2019 IEEE/ACM Workshop on Memory Centric High Performance Computing, MCHPC 2019
CountryUnited States
CityDenver
Period19/11/18 → …

Keywords

  • Data structure
  • Hyperplane ordering method
  • Performance optimization
  • Turbine simulation code
  • Vector supercomputer

ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture
  • Information Systems and Management
  • Control and Optimization

Fingerprint Dive into the research topics of 'Optimizing memory layout of hyperplane ordering for vector supercomputer SX-aurora TSUBASA'. Together they form a unique fingerprint.

Cite this