Abstract
In this paper, the model for wire length distribution model in three dimensional LSI is derived using Rent's rule. The number of the vertical interconnections and the ratio in all of wirings can be calculated with this model. This model clearly shows that many vertical interconnections are effectively utilized in chips with high Rent's constant p. We also evaluate the vertical interconnection density and the occupied area by the vertical interconnection in a chip.
Original language | English |
---|---|
Pages (from-to) | 35-43 |
Number of pages | 9 |
Journal | Advanced Metallization Conference (AMC) |
Publication status | Published - 2003 |
Event | Advanced Metallization Conference 2003, AMC 2003 - Montreal, Que., Canada Duration: 2003 Oct 21 → 2003 Oct 23 |
ASJC Scopus subject areas
- Chemical Engineering(all)