Optimization of vertical interconnection in 3D LSI using wire-length distribution

T. Nakamura; Y. Yamada; T. Ono; J. C. Shim; H. Kurino; M. Koyanagi

Optimization of vertical interconnection in 3D LSI using wire-length distribution

T. Nakamura, Y. Yamada, T. Ono, J. C. Shim, H. Kurino, M. Koyanagi

New Industry Creation Hatchery Center (NICHe)

Research output: Contribution to journal › Conference article › peer-review

2 Citations (Scopus)

Abstract

In this paper, the model for wire length distribution model in three dimensional LSI is derived using Rent's rule. The number of the vertical interconnections and the ratio in all of wirings can be calculated with this model. This model clearly shows that many vertical interconnections are effectively utilized in chips with high Rent's constant p. We also evaluate the vertical interconnection density and the occupied area by the vertical interconnection in a chip.

Original language	English
Pages (from-to)	35-43
Number of pages	9
Journal	Advanced Metallization Conference (AMC)
Publication status	Published - 2003
Event	Advanced Metallization Conference 2003, AMC 2003 - Montreal, Que., Canada Duration: 2003 Oct 21 → 2003 Oct 23

ASJC Scopus subject areas

Chemical Engineering(all)

Cite this

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title = "Optimization of vertical interconnection in 3D LSI using wire-length distribution",

abstract = "In this paper, the model for wire length distribution model in three dimensional LSI is derived using Rent's rule. The number of the vertical interconnections and the ratio in all of wirings can be calculated with this model. This model clearly shows that many vertical interconnections are effectively utilized in chips with high Rent's constant p. We also evaluate the vertical interconnection density and the occupied area by the vertical interconnection in a chip.",

author = "T. Nakamura and Y. Yamada and T. Ono and Shim, {J. C.} and H. Kurino and M. Koyanagi",

year = "2003",

language = "English",

pages = "35--43",

journal = "Advanced Metallization Conference (AMC)",

issn = "1540-1766",

note = "Advanced Metallization Conference 2003, AMC 2003 ; Conference date: 21-10-2003 Through 23-10-2003",

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T1 - Optimization of vertical interconnection in 3D LSI using wire-length distribution

AU - Nakamura, T.

AU - Yamada, Y.

AU - Ono, T.

AU - Shim, J. C.

AU - Kurino, H.

AU - Koyanagi, M.

PY - 2003

Y1 - 2003

N2 - In this paper, the model for wire length distribution model in three dimensional LSI is derived using Rent's rule. The number of the vertical interconnections and the ratio in all of wirings can be calculated with this model. This model clearly shows that many vertical interconnections are effectively utilized in chips with high Rent's constant p. We also evaluate the vertical interconnection density and the occupied area by the vertical interconnection in a chip.

AB - In this paper, the model for wire length distribution model in three dimensional LSI is derived using Rent's rule. The number of the vertical interconnections and the ratio in all of wirings can be calculated with this model. This model clearly shows that many vertical interconnections are effectively utilized in chips with high Rent's constant p. We also evaluate the vertical interconnection density and the occupied area by the vertical interconnection in a chip.

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M3 - Conference article

AN - SCOPUS:21644433279

SP - 35

EP - 43

JO - Advanced Metallization Conference (AMC)

JF - Advanced Metallization Conference (AMC)

SN - 1540-1766

T2 - Advanced Metallization Conference 2003, AMC 2003

Y2 - 21 October 2003 through 23 October 2003

ER -

Optimization of vertical interconnection in 3D LSI using wire-length distribution

Abstract

ASJC Scopus subject areas

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