Bias-stress resistance of polymer-based organic field-effect transistors (OFETs) is considerably enhanced by coating the gate dielectric surface with an amorphous perfluoropolymer (CYTOP). In bottom-gate (BG) OFETs offering a relatively simple fabrication process, the CYTOP coating causes a serious problem; that is, thin film formation of organic semiconducting polymers generally fails due to the lyophobic properties of CYTOP. This problem is solved by patterning the CYTOP coating layer with suitable designs. Here, a simple photo-patterning method is established using CYTOP terminated with amidosilyl functional groups. This method is composed of self-limited thinning process of CYTOP coating layers, exposure to vacuum ultraviolet light through a photomask, and development. BG/top-contact OFET arrays are fabricated using poly(2,5-bis(3-hexadecylthiophene-2-yl)thieno[3,2-b]thiophene) as the semiconducting polymer. The initial electrical properties and bias-stress resistance are compared with those of OFETs with octadecyltrichlorosilane (ODTS)-treated gate dielectrics. The CYTOP- and ODTS-OFETs show approximately the same initial electrical properties with very small device-to-device variation, while the CYTOP-OFETs exhibit much higher intrinsic bias-stress resistance. Therefore, the spin-coating combined with the simple photo-patterning method is a promising technique that can form polymeric organic semiconductor layers on CYTOP layers and produce BG OFETs exhibiting very high operational stability.
- bias-stress effects
- organic field-effect transistors
- polymeric organic semiconductors
- self-limited thinning processes
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials