OpenCL-based design of an FPGA accelerator for quantum annealing simulation

Quantum annealing (QA) is a method to find the global optimum for a combinatorial optimization problem by using quantum fluctuations. QA can be simulated on a computer using quantum Monte Carlo (QMC) simulation of the Ising model, while sacrificing a huge processing time. It has been shown that the processing time of QMC simulation on a CPU scales similarly to that of QA on the D-wave 2X quantum annealer, although the latter is over 10 ⁸ times faster than the former. However, large problems should be partitioned into sub-problems and solved separately, and this reduces the processing speed of the quantum annealer. Since the access to a quantum annealer is also limited, acceleration of QA simulations using conventional computers is regarded as a very important topic. If we can reduce the huge computational time, it is possible to use QA simulations to solve combinatorial optimization problems. We propose an FPGA accelerator for QA simulations designed using “open computing language.” We achieved up to 12.6 times speed-up for single FPGA implementation and 23.8 times speed-up for two-FPGA implementation compared to a CPU. We also achieved over 9-times large energy efficiency compared to a CPU-based system.