On-chip 96.5% current efficiency CMOS linear regulator using a flexible control technique of output current

Tetsuo Endoh; Kazuhisa Sunaga; Hiroshi Sakuraba; Fujio Masuoka

doi:10.1109/4.896226

On-chip 96.5% current efficiency CMOS linear regulator using a flexible control technique of output current

Tetsuo Endoh, Kazuhisa Sunaga, Hiroshi Sakuraba, Fujio Masuoka

ENG - Electrical Engineering

Research output: Contribution to journal › Article › peer-review

19 Citations (Scopus)

Abstract

This paper proposes an on-chip 96.5% current efficiency CMOS linear regulator using a Flexible Control technique of Output Current (FCOC). By the use of the FCOC technique, the proposed circuit realizes to drive a flexible output current according to the load current variation. Therefore, the proposed linear regulator can supply stable output voltage using the FCOC technique. The linear regulator is fabricated by double-metal 1.2-μm CMOS technology. The number of transistors is 46 and the die size is 0.423 mm². The fabricated linear regulator achieves a fluctuation of output voltage less than 6.81 mV_p-p at a frequency of output current f(I_out) ranging from 1.8 Hz to 100 MHz. Moreover, the fabricated on-chip CMOS linear regulator can achieve 96.5% current efficiency.

Original language	English
Pages (from-to)	34-39
Number of pages	6
Journal	IEEE Journal of Solid-State Circuits
Volume	36
Issue number	1
DOIs	https://doi.org/10.1109/4.896226
Publication status	Published - 2001 Jan

ASJC Scopus subject areas

Electrical and Electronic Engineering

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abstract = "This paper proposes an on-chip 96.5% current efficiency CMOS linear regulator using a Flexible Control technique of Output Current (FCOC). By the use of the FCOC technique, the proposed circuit realizes to drive a flexible output current according to the load current variation. Therefore, the proposed linear regulator can supply stable output voltage using the FCOC technique. The linear regulator is fabricated by double-metal 1.2-μm CMOS technology. The number of transistors is 46 and the die size is 0.423 mm2. The fabricated linear regulator achieves a fluctuation of output voltage less than 6.81 mVp-p at a frequency of output current f(Iout) ranging from 1.8 Hz to 100 MHz. Moreover, the fabricated on-chip CMOS linear regulator can achieve 96.5% current efficiency.",

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AU - Endoh, Tetsuo

AU - Sunaga, Kazuhisa

AU - Sakuraba, Hiroshi

AU - Masuoka, Fujio

PY - 2001/1

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AB - This paper proposes an on-chip 96.5% current efficiency CMOS linear regulator using a Flexible Control technique of Output Current (FCOC). By the use of the FCOC technique, the proposed circuit realizes to drive a flexible output current according to the load current variation. Therefore, the proposed linear regulator can supply stable output voltage using the FCOC technique. The linear regulator is fabricated by double-metal 1.2-μm CMOS technology. The number of transistors is 46 and the die size is 0.423 mm2. The fabricated linear regulator achieves a fluctuation of output voltage less than 6.81 mVp-p at a frequency of output current f(Iout) ranging from 1.8 Hz to 100 MHz. Moreover, the fabricated on-chip CMOS linear regulator can achieve 96.5% current efficiency.

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On-chip 96.5% current efficiency CMOS linear regulator using a flexible control technique of output current

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