Novel switch block architecture using non-volatile functional pass-gate for multi-context FPGAs

Masanori Hariyama, Weisheng Chong, Sho Ogata, Michitaka Kameyama

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

Dynamically-programmable gate arrays (DPGAs) promise lower-cost implementations than conventional FPGAs since they efficiently reuse limited hardware resources in time. One of typical DPGA architectures is a multi-context one. Multi-context FPGAs (MC-FPGAs) have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. The additional memory planes cause significant overhead in area and power consumption. To overcome the overhead, a fine-grained reconfigurable architecture called reconfigurable context memory (RCM) is presented based on the fact that there are redundancy and regularity in configuration bits between different contexts. A floating-MOS functional pass-gate, where storage and switch functions are merged, is used to construct the RCM area-efficiently.

Original languageEnglish
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design
EditorsA. Smailagic, N. Ranganathan
Pages46-50
Number of pages5
DOIs
Publication statusPublished - 2005 Oct 25
EventIEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design - Tampa, FL, United States
Duration: 2005 May 112005 May 12

Publication series

NameProceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI

Other

OtherIEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design
CountryUnited States
CityTampa, FL
Period05/5/1105/5/12

ASJC Scopus subject areas

  • Engineering(all)

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