Novel local stress evaluation method in 3D IC using DRAM cell array with planar mOS capacitors

Seiya Tanikawa, Hisashi Kino, Takafumi Fukushima, Mitsumasa Koyanagi, Tetsu Tanaka

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Three-dimensional integrated circuit (3D IC) is one of the promising ways to enhance IC performance. Each IC chip is mechanically connected by organic adhesive and metal microbumps. Coefficient of thermal expansion (CTE) mismatch between materials causes local bending stress in IC chips, leading to negative effects in IC performance. In this study, we have fabricated a test structure with DRAM cell array having planar MOS capacitors. Using the test structure, we measured both DRAM chip bending profiles and retention time modulations of DRAM cell array. Consequently, we have successfully demonstrated that the local bending stress in IC chips can be two-dimensionally evaluated using the DRAM cell array with planar MOS capacitances. This evaluation methods leads to realization of 3D IC with high reliability.

Original languageEnglish
Title of host publication2015 International 3D Systems Integration Conference, 3DIC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesTS3.1.1-TS3.1.4
ISBN (Electronic)9781467393850
DOIs
Publication statusPublished - 2015 Nov 20
EventInternational 3D Systems Integration Conference, 3DIC 2015 - Sendai, Japan
Duration: 2015 Aug 312015 Sep 2

Publication series

Name2015 International 3D Systems Integration Conference, 3DIC 2015

Other

OtherInternational 3D Systems Integration Conference, 3DIC 2015
CountryJapan
CitySendai
Period15/8/3115/9/2

Keywords

  • 3D IC
  • CTE mismatch
  • DRAM
  • MOS capacitor
  • Mechanical stress
  • Reliability

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Tanikawa, S., Kino, H., Fukushima, T., Koyanagi, M., & Tanaka, T. (2015). Novel local stress evaluation method in 3D IC using DRAM cell array with planar mOS capacitors. In 2015 International 3D Systems Integration Conference, 3DIC 2015 (pp. TS3.1.1-TS3.1.4). [7334557] (2015 International 3D Systems Integration Conference, 3DIC 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/3DIC.2015.7334557