TY - GEN
T1 - Nonvolatile logic and memory devices based on spintronics
AU - Endoh, Tetsuo
PY - 2015/7/27
Y1 - 2015/7/27
N2 - New computer memory hierarchy based on spintronics is proposed for low-power electronics that will evolve in two steps from the current volatile system. At first, memories for internal states and pipeline registers and cache memories etc. are made nonvolatile by using spintronics. Then, computers can be made totally nonvolatile by additionally adopting spintronics-based logic-in-memory architecture. Nonvolatile MPU, recognition processor and cache memory that use magnetic tunnel junction (MTJ) have been designed and fabricated to demonstrate their superior features in low static power and high speed data store and restore operations.
AB - New computer memory hierarchy based on spintronics is proposed for low-power electronics that will evolve in two steps from the current volatile system. At first, memories for internal states and pipeline registers and cache memories etc. are made nonvolatile by using spintronics. Then, computers can be made totally nonvolatile by additionally adopting spintronics-based logic-in-memory architecture. Nonvolatile MPU, recognition processor and cache memory that use magnetic tunnel junction (MTJ) have been designed and fabricated to demonstrate their superior features in low static power and high speed data store and restore operations.
KW - STT-MRAM
KW - magnetic tunnel junction
KW - nonvolatile computer
KW - power gating
KW - spintronics
UR - http://www.scopus.com/inward/record.url?scp=84946235556&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84946235556&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2015.7168558
DO - 10.1109/ISCAS.2015.7168558
M3 - Conference contribution
AN - SCOPUS:84946235556
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 13
EP - 16
BT - 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - IEEE International Symposium on Circuits and Systems, ISCAS 2015
Y2 - 24 May 2015 through 27 May 2015
ER -