Ni-based FUSI gates: CMOS integration for 45nm node and beyond

T. Hoffmann, A. Veloso, A. Lauwers, H. Yu, H. Tigelaar, M. Van Dal, T. Chiarella, C. Kerner, T. Kauerauf, A. Shickova, R. Mitsuhashi, I. Satoru, M. Niwa, A. Rothschild, B. Froment, J. Ramos, A. Nackaerts, M. Rosmeulen, S. Brus, C. VranckenP. P. Absil, M. Jurczak, S. Biesemans, J. A. Kittl

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

This work reports the first comprehensive evaluation of FUSI gates for manufacturability, covering the key aspects of integration, process control, reliability, matching, device design and circuit-level benefit. Thanks to a selective and controlled poly etch-back process, dual work-function Nibased FUSI CMOS circuits with record ring oscillator performance (high-VT applications) have been achieved (17ps at VDD=1.1V and 20pA/μm Ioff), meeting the ITRS 45nm node requirement for low power CMOS.

Original languageEnglish
Title of host publication2006 International Electron Devices Meeting Technical Digest, IEDM
DOIs
Publication statusPublished - 2006 Dec 1
Externally publishedYes
Event2006 International Electron Devices Meeting, IEDM - San Francisco, CA, United States
Duration: 2006 Dec 102006 Dec 13

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Other

Other2006 International Electron Devices Meeting, IEDM
CountryUnited States
CitySan Francisco, CA
Period06/12/1006/12/13

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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