New three-dimensional integration technology using reconfigured wafers

Mitsumasa Koyanagi, Takafumi Fukushima, Tetsu Tanaka

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We have proposed a new three-dimensional (3D) integration technology based on reconfigured wafer-on-wafer bonding technique to solve several problems in 3D integration technology using the conventional wafer-on-wafer bonding technique. 3D LSIs are fabricated by bonding the reconfigured wafers onto the supporting Si wafer. The reconfigured wafer consists of many known good dies (KGDs) which are arrayed and glued on a holding Si wafer with Si steps by chip self-assembly technique. Therefore, the yield of the reconfigured wafer can be 100%. As a result, we can obtain a high production yield even after bonding many wafers. In addition, it is not necessary in the reconfigured wafer that the chip size has to be identical within the wafer. Therefore, we can stack various kinds of chips with different chip sizes, different materials and different devices in our new 3D integration technology based on the configured-wafer-on-wafer bonding technique (Reconfig. W-on-W 3D technology).

Original languageEnglish
Title of host publicationICSICT 2008 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology Proceedings
Pages1188-1191
Number of pages4
DOIs
Publication statusPublished - 2008 Dec 1
Event2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008 - Beijing, China
Duration: 2008 Oct 202008 Oct 23

Publication series

NameInternational Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT

Other

Other2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008
CountryChina
CityBeijing
Period08/10/2008/10/23

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Condensed Matter Physics
  • Electronic, Optical and Magnetic Materials

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