New three-dimensional integration technology to achieve a super chip

Mitsumasa Koyanagi, Takafumi Fukushima, Tetsu Tanaka

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We have proposed a new mree-dimensional (3D) integration technology based on a chip-to-wafer bonding method which is called a super chip integration technology. Various kinds of chips such as processor chip, memory chips, analog IC chip and sensor chips which are fabricated by different technologies can be vertically stacked into a 3D LSI chip by using a super chip integration technology. Such 3D LSI chip is called a super chip. Various kinds of chips with different chip size, chip thickness and material can be vertically stacked in the super chip integration technology. To establish the super chip integration technology, several key technologies of vertical interconnection formation, chip alignment and bonding, adhesive injection, and chip thinning and planarization were developed. By using the super chip integration technology, three-layer stacked LSI chips with vertical interconnections were successfully fabricated.

Original languageEnglish
Title of host publicationICSICT-2006
Subtitle of host publication2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
PublisherIEEE Computer Society
Pages318-321
Number of pages4
ISBN (Print)1424401615, 9781424401611
DOIs
Publication statusPublished - 2006 Jan 1
EventICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology - Shanghai, China
Duration: 2006 Oct 232006 Oct 26

Publication series

NameICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Other

OtherICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology
CountryChina
CityShanghai
Period06/10/2306/10/26

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Koyanagi, M., Fukushima, T., & Tanaka, T. (2006). New three-dimensional integration technology to achieve a super chip. In ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings (pp. 318-321). [4098096] (ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). IEEE Computer Society. https://doi.org/10.1109/ICSICT.2006.306217