New reconfigurable memory architecture for parallel image-processing LSI with three-dimensional structure

Shigeo Kodama, Daijirou Amano, Takeaki Sugimura, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi

Research output: Contribution to journalArticle

4 Citations (Scopus)

Abstract

A reconfigurable memory network for a parallel image-processing LSI with a three-dimensional structure is proposed. The proposed memory network can be dynamically configured by changing the connections between processing elements (PEs) and memories in accordance with the required part of the stored image data. In addition, a specification of the data bandwidth between PEs and the proposed memory network can be changed in the synchronization with single instruction stream-multiple data stream (SIMD) and multiple instruction stream-multiple data stream (MIMD) operations. Therefore, data transfer has greater flexibility. Also, from the result of the performance evaluation by implementation into the field programmable gate array (FPGA), it was successfully shown that the proposed memory network reduced the execution time by up to 28.2% for a 9 × 9 filtering operation.

Original languageEnglish
Pages (from-to)2774-2778
Number of pages5
JournalJapanese journal of applied physics
Volume47
Issue number4 PART 2
DOIs
Publication statusPublished - 2008 Apr 25

Keywords

  • 3D LSI
  • Memory network
  • Parallel image-processing
  • Reconfigurable architecture
  • Robot vision system

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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