NEW ARCHITECTURE OF HIGHLY RELIABLE DIGITAL SIGNAL PROCESSOR USING MICROPROCESSORS.

Michitaka Kameyama, Tatsuo Higuchi

Research output: Contribution to journalArticlepeer-review

Abstract

A highly reliable digital signal processor for on-line, real-time digital signal processing is proposed and designed. The signal processor is implemented by sampling periods. Digital signal processing is executed at different times by different microprocessors, so that simultaneous-failures which occur in any two or three modules at a time can be tolerated. It is shown that under the environment of simultaneous-faiures the reliability of the signal processor is greatly superior.

Original languageEnglish
Pages (from-to)199-210
Number of pages12
JournalTechnology Reports of the Tohoku University
Volume48
Issue number2
Publication statusPublished - 1983 Jan 1

ASJC Scopus subject areas

  • Engineering(all)

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