@inproceedings{717a61ee4eeb487aaf4fced0c9cb4011,
title = "New 3D integration technology and 3D system LSIs",
abstract = "A three-dimensional (3-D) integration technology based on the wafer-to-wafer bonding has been developed. Various kinds of 3-D LSI test chips such as 3-D microprocessor chip have been fabricated by using this technology. In addition, we have developed a new 3-D integration technology called super-chip integration based on the reconfigured wafer- to-wafer bonding in which the reconfigured wafers are produced by simultaneously aligning and bonding more than one thousand of known good dies (KGD's) on a supporting wafer using a self-assembly technique.",
keywords = "3D LSI, Super chip, TSV, Wafer bonding",
author = "Mitsumasa Koyanagi",
year = "2009",
month = nov,
day = "16",
language = "English",
isbn = "9784863480094",
series = "Digest of Technical Papers - Symposium on VLSI Technology",
pages = "64--67",
booktitle = "2009 Symposium on VLSI Technology, VLSIT 2009",
note = "2009 Symposium on VLSI Technology, VLSIT 2009 ; Conference date: 16-06-2009 Through 18-06-2009",
}