Neuron-Synapse IC Chip-Set for Large-Scale Chaotic Neural Networks

Yoshihiko Horio, Kazuyuki Aihara, O. Yamamoto

Research output: Contribution to journalArticlepeer-review

48 Citations (Scopus)

Abstract

We propose a neuron-synapse integrated circuit (IC) chip-set for large-scale chaotic neural networks. We use switched-capacitor (SC) circuit techniques to implement a three-internal-state transiently-chaotic neural network model. The SC chaotic neuron chip faithfully reproduces complex chaotic dynamics in real numbers through continuous state variables of the analog circuitry. We can digitally control most of the model parameters by means of programmable capacitive arrays embedded in the SC chaotic neuron chip. Since the output of the neuron is transfered into a digital pulse according to the all-or-nothing property of an axon, we design a synapse chip with digital circuits. We propose a memory-based synapse circuit architecture to achieve a rapid calculation of a vast number of weighted summations. Both of the SC neuron and the digital synapse circuits have been fabricated as IC forms. We have tested these IC chips extensively, and confirmed the functions and performance of the chip-set. The proposed neuron-synapse IC chip-set makes it possible to construct a scalable and reconfigurable large-scale chaotic neural network with 10000 neurons and 10 0002 synaptic connections.

Original languageEnglish
Pages (from-to)1393-1404
Number of pages12
JournalIEEE Transactions on Neural Networks
Volume14
Issue number5
DOIs
Publication statusPublished - 2003 Sep
Externally publishedYes

Keywords

  • Chaos
  • Chaotic neural networks
  • Large-scale neural networks
  • Mixed analog/digital system

ASJC Scopus subject areas

  • Software
  • Computer Science Applications
  • Computer Networks and Communications
  • Artificial Intelligence

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