Neuromorphic vision chip fabricated using three-dimensional integration technology

M. Koyanagi; Y. Nakagawa; K. W. Lee; T. Nakamura; Y. Yamada; K. Inamura; K. T. Park; H. Kurino

Neuromorphic vision chip fabricated using three-dimensional integration technology

M. Koyanagi, Y. Nakagawa, K. W. Lee, T. Nakamura, Y. Yamada, K. Inamura, K. T. Park, H. Kurino

New Industry Creation Hatchery Center (NICHe)

Research output: Contribution to journal › Conference article › peer-review

113 Citations (Scopus)

Abstract

A neuromorphic vision chip with three dimesional structure was fabricated using three dimensional integration technology. The device wafer with buried interconnections was glued to the quartz glass and then thinned from the backside using mechanical grinding and chemical mechanical polishing (CMP). On the bottom of the buried interconnections on the backside, micro bumps were formed. The thinned wafer was glued to another wafer. The three dimensional stacked wafer was obtained by repeating this sequence.

Original language	English
Pages (from-to)	270-271+454
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Publication status	Published - 2001 Jan 1
Event	Digest of Technical Papers - IEEE International Solid-State Circuits Conference - Duration: 2001 Feb 5 → 2001 Feb 6

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Neuromorphic vision chip fabricated using three-dimensional integration technology'. Together they form a unique fingerprint.

Cite this

Neuromorphic vision chip fabricated using three-dimensional integration technology. / Koyanagi, M.; Nakagawa, Y.; Lee, K. W.; Nakamura, T.; Yamada, Y.; Inamura, K.; Park, K. T.; Kurino, H.

In: Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 01.01.2001, p. 270-271+454.

Research output: Contribution to journal › Conference article › peer-review

@article{e8dab85e155b4054b434370a6b8a88d0,

title = "Neuromorphic vision chip fabricated using three-dimensional integration technology",

abstract = "A neuromorphic vision chip with three dimesional structure was fabricated using three dimensional integration technology. The device wafer with buried interconnections was glued to the quartz glass and then thinned from the backside using mechanical grinding and chemical mechanical polishing (CMP). On the bottom of the buried interconnections on the backside, micro bumps were formed. The thinned wafer was glued to another wafer. The three dimensional stacked wafer was obtained by repeating this sequence.",

author = "M. Koyanagi and Y. Nakagawa and Lee, {K. W.} and T. Nakamura and Y. Yamada and K. Inamura and Park, {K. T.} and H. Kurino",

year = "2001",

month = jan,

day = "1",

language = "English",

pages = "270--271+454",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference ; Conference date: 05-02-2001 Through 06-02-2001",

}

TY - JOUR

T1 - Neuromorphic vision chip fabricated using three-dimensional integration technology

AU - Koyanagi, M.

AU - Nakagawa, Y.

AU - Lee, K. W.

AU - Nakamura, T.

AU - Yamada, Y.

AU - Inamura, K.

AU - Park, K. T.

AU - Kurino, H.

PY - 2001/1/1

Y1 - 2001/1/1

N2 - A neuromorphic vision chip with three dimesional structure was fabricated using three dimensional integration technology. The device wafer with buried interconnections was glued to the quartz glass and then thinned from the backside using mechanical grinding and chemical mechanical polishing (CMP). On the bottom of the buried interconnections on the backside, micro bumps were formed. The thinned wafer was glued to another wafer. The three dimensional stacked wafer was obtained by repeating this sequence.

AB - A neuromorphic vision chip with three dimesional structure was fabricated using three dimensional integration technology. The device wafer with buried interconnections was glued to the quartz glass and then thinned from the backside using mechanical grinding and chemical mechanical polishing (CMP). On the bottom of the buried interconnections on the backside, micro bumps were formed. The thinned wafer was glued to another wafer. The three dimensional stacked wafer was obtained by repeating this sequence.

UR - http://www.scopus.com/inward/record.url?scp=0035054823&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0035054823&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0035054823

SP - 270-271+454

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

SN - 0193-6530

T2 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Y2 - 5 February 2001 through 6 February 2001

ER -

Neuromorphic vision chip fabricated using three-dimensional integration technology

Abstract

ASJC Scopus subject areas

Other files and links

Cite this