Nano-electron-beam lithography system and its application for 40-nm gate MOSFETs

Yukinori Ochiai, Shoko Manako, Seiji Samukawa, Kiyoshi Takeuchi, Toyoji Yamamoto

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)


A nanometer Electron Beam (EB) lithography system has been developed and used for fabricating nanometer order MOSFETs. The system uses a Zr/O/W Thermal Field Emitter (TFE) and has a 5 nm-diameter beam at a current of 100 pA, an acceleration voltage of 50 kV. A 10 nm line was successfully delineated in PMMA (Polymethyl Methacrylate) on a thick Si substrate. A chemically amplified negative resist was used as a single layer mask for minute MOSFET gate fabrication, and showed high resolution less than 0.1, μm width. Proximity effect correction was applied to the gate lithography, resulting in excellent line width control even less than 0.1 μm. Operation of a 40 nm-polysilicon gate nMOSFET was confirmed.

Original languageEnglish
Pages (from-to)160-168
Number of pages9
JournalNEC Research and Development
Issue number2
Publication statusPublished - 1996 Dec 1
Externally publishedYes


  • Dry etching
  • Electron Beam (EB) lithography
  • LSI
  • Nanolithography
  • Resist

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


Dive into the research topics of 'Nano-electron-beam lithography system and its application for 40-nm gate MOSFETs'. Together they form a unique fingerprint.

Cite this