Multiple-Valued Radix-2 Signed-Digit Arithmetic Circuits for High-Performance VLSI Systems

Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi

Research output: Contribution to journalArticlepeer-review

32 Citations (Scopus)

Abstract

— VLSI-oriented multiple-valued current-mode MOS arithmetic circuits using radix-2 signed-digit (SD) number representations are proposed. A prototype adder chip is implemented with 10-μm CMOS technology to confirm the principle operation. Furthermore, a new multiplication scheme using four-input current-mode wired summations is presented to realize a high-speed small-size multiplier. The designed 32 × 32-bit multiplier is composed of 18 800 transistors and required fewer interconnections. The multiply time is estimated to be 45 ns by SPICE simulation in 2-μm CMOS technology. It is shown that the developed technology is also potentially effective for the reduction of the data-bus area in VLSI.

Original languageEnglish
Pages (from-to)125-131
Number of pages7
JournalIEEE Journal of Solid-State Circuits
Volume25
Issue number1
DOIs
Publication statusPublished - 1990 Feb

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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