Multiple-valued arithmetic integrated circuits based on 1.5V-supply dual-rail source-coupled logic

Takahiro Hanyu, Akira Mochizuki, Michitaka Kameyama

Research output: Contribution to journalConference articlepeer-review

7 Citations (Scopus)

Abstract

This paper presents a new multiple-valued current-mode MOS integrated circuit for high-speed arithmetic systems with a low supply voltage. The use of a multiple-valued source-coupled logic circuit with dual-rail complementary inputs makes a signal-voltage swing small with a constant driving current, so that the switching delay of the circuit can be reduced at a low supply voltage. As an application to arithmetic systems, we demonstrate that a 1.5V-supply 200MHz 54 × 54-bit pipelined multiplier using the proposed circuits can be designed with a 0.8-μm standard CMOS technology.

Original languageEnglish
Pages (from-to)64-69
Number of pages6
JournalProceedings of The International Symposium on Multiple-Valued Logic
Publication statusPublished - 1995 Jan 1
EventProceedings of the 1995 25th International Symposium on Multiple-Valued Logic - Bloomington, IN, USA
Duration: 1995 May 231995 May 25

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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