Multi-scale measurement of the change of the residual stress in a silicon chip during manufacturing from thin-film processing to packaging

Hiroki Kishi, Takuya Sasaki, Nobuki Ueta, Ken Suzuki, Hideo Miura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Both thermal and intrinsic stresses that occur during thin-film processing and packaging dominate the final residual stress in thin film electronic devices. Since the residual stress causes the shift of electronic functions of dielectric and semiconductor materials, these shifts sometimes degrade their performance and reliability. Therefore, it is very important to measure and control the residual stress in thin-film-applied products. In this study, the changes of the electronic performance of MOS transistors by mechanical stress were measured by applying a four-point bending method. The stress sensitivity of the transconductance of NMOS transistors increased from about 1%/100-MPa to about 15%/100-MPa by decreasing the gate length of the transistors from 400 nm to 150 nm. So, it showed miniaturization of transistors increased the stress sensitivity of the performance. One of the estimated important factors which dominated this increase was attributed to the interference of stress concentration fields occurred at the edges of gate electrodes. The change of the residual stress in a transistor structure caused by deposition of thin films was analyzed by applying a finite element method (FEM). The estimated change was validated by experiment using originally developed stress sensing chips. The estimated change of the stress due to deposition of gate electrode tungsten film was about 25MPa. The measured average stress was about 20MPa and it agreed well with the estimated value. Next, the change of the residual stress caused by the interference of the stress concentration fields between gate-electrodes was validated by applying this stress sensing chip. The measured change of the stress caused by making one slit by focused ion beam was about 70MPa and it agreed well with the estimated value of about 60MPa. In addition, the change of residual stress was increased with the more decreased width of slits. It was confirmed, therefore, that both the thin film process-induced stress and the packaging-induced stress change the final residual stress in a transistor structure and the change can be evaluated by our stress-sensing chip quantitatively.

Original languageEnglish
Title of host publicationIMPACT Conference 2009 International 3D IC Conference - Proceedings
Pages293-296
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
EventIMPACT Conference 2009 International 3D IC Conference - Taipei, Taiwan, Province of China
Duration: 2009 Oct 212009 Oct 23

Publication series

NameIMPACT Conference 2009 International 3D IC Conference - Proceedings

Other

OtherIMPACT Conference 2009 International 3D IC Conference
CountryTaiwan, Province of China
CityTaipei
Period09/10/2109/10/23

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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    Kishi, H., Sasaki, T., Ueta, N., Suzuki, K., & Miura, H. (2009). Multi-scale measurement of the change of the residual stress in a silicon chip during manufacturing from thin-film processing to packaging. In IMPACT Conference 2009 International 3D IC Conference - Proceedings (pp. 293-296). [5382116] (IMPACT Conference 2009 International 3D IC Conference - Proceedings). https://doi.org/10.1109/IMPACT.2009.5382116