MTJ-Based Nonvolatile Logic-in-Memory Circuit with Feedback-Type Equal-Resistance Sensing Mechanism for Ternary Neural Network Hardware

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A compact and energy-efficient ternary logic gate based on MTJ-based nonvolatile logic-in-memory (NV-LIM) architecture is proposed for ternary neural network (TNN) hardware implementation. The use of feedback loops for equal-resistance sensing of magnetic tunnel junction (MTJ) devices achieves better energy efficiency as well as reduced MTJ device count and circuit area. Through an experimental evaluation of a basic component of TNN hardware, its impact on the compact and energy-efficient TNN hardware design is demonstrated.

Original languageEnglish
Title of host publication2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728135236
DOIs
Publication statusPublished - 2019 Oct 14
Event2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019 - San Jose, United States
Duration: 2019 Oct 142019 Oct 17

Publication series

Name2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019

Conference

Conference2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019
CountryUnited States
CitySan Jose
Period19/10/1419/10/17

Keywords

  • MTJ device
  • deep learning
  • nonvolatile logic-in-memory
  • ternary neural network

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Electronic, Optical and Magnetic Materials

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