MRAM writing circuitry to compensate for thermal variation of magnetization reversal current

Takeshi Honda; Noboru Sakimura; Tadahiko Sugibayashi; Hideaki Numata; Sadahiko Miura; Hiromitsu Hada; Shuichi Tahara

MRAM writing circuitry to compensate for thermal variation of magnetization reversal current

Takeshi Honda, Noboru Sakimura, Tadahiko Sugibayashi, Hideaki Numata, Sadahiko Miura, Hiromitsu Hada, Shuichi Tahara

Research output: Contribution to journal › Article › peer-review

Abstract

MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write failures from degrading 1 Gb MRAM yield where the standard deviation of magnetization-reversal current variation from other origins is less than 5%.

Original language	English
Pages (from-to)	612-617
Number of pages	6
Journal	IEICE Transactions on Electronics
Volume	E86-C
Issue number	4
Publication status	Published - 2003 Apr
Externally published	Yes

Keywords

MRAM
Magnetization reversal current
Thermal variation compensation

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

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title = "MRAM writing circuitry to compensate for thermal variation of magnetization reversal current",

abstract = "MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write failures from degrading 1 Gb MRAM yield where the standard deviation of magnetization-reversal current variation from other origins is less than 5%.",

keywords = "MRAM, Magnetization reversal current, Thermal variation compensation",

author = "Takeshi Honda and Noboru Sakimura and Tadahiko Sugibayashi and Hideaki Numata and Sadahiko Miura and Hiromitsu Hada and Shuichi Tahara",

year = "2003",

month = apr,

language = "English",

volume = "E86-C",

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journal = "IEICE Transactions on Electronics",

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T1 - MRAM writing circuitry to compensate for thermal variation of magnetization reversal current

AU - Honda, Takeshi

AU - Sakimura, Noboru

AU - Sugibayashi, Tadahiko

AU - Numata, Hideaki

AU - Miura, Sadahiko

AU - Hada, Hiromitsu

AU - Tahara, Shuichi

PY - 2003/4

Y1 - 2003/4

N2 - MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write failures from degrading 1 Gb MRAM yield where the standard deviation of magnetization-reversal current variation from other origins is less than 5%.

AB - MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write failures from degrading 1 Gb MRAM yield where the standard deviation of magnetization-reversal current variation from other origins is less than 5%.

KW - MRAM

KW - Magnetization reversal current

KW - Thermal variation compensation

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M3 - Article

AN - SCOPUS:0142217361

VL - E86-C

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EP - 617

JO - IEICE Transactions on Electronics

JF - IEICE Transactions on Electronics

SN - 0916-8524

IS - 4

ER -

MRAM writing circuitry to compensate for thermal variation of magnetization reversal current

Abstract

Keywords

ASJC Scopus subject areas

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